Typical Von Newmann architecture computers operate as sequential state machines. Conventionally, control logic is utilized to implement a desired state machine by defining the state functions and the various conditional inter-state pathways. The control logic may take the form of either random-hardwired or micro-programmed sequence control logic. In the case of random-hardwired control logic, the state machine is implemented directly as an optimized gate logic design. Generally such random-hardwired state machine implementations are recognized for their high speed, optimal use of logic gates, and minimized circuit size and power dissipation characteristics. Such designs are also recognized as each being substantially unique, time intensive to perfect, and correspondingly costly to initially produce.
Microprogrammed implementations of state machines conventionally include a microcode program, or microprogram, a storage unit, a pipeline register and a next-address generator or microprogram sequencer. The control logic often further includes logic components, such as an arithmetic logic unit (ALU), for the performance of specific types of state functions. The microprogram is typically a sequence of microcode words stored in a conventional equivalent of a PROM or ROM memory circuit within the storage unit. The sequencer provides an address to this microcode store as a pointer to the next microcode word in the execution of the microprogram. The microcode store, in turn provides the corresponding microcode word to the pipeline register. In turn, the microcode word is typically buffered by the pipeline register and made available to the various logic components of the state machine control logic. In particular a portion of the microcode word is routed back to the sequencer as a sequencer instruction that generally determines the next address to be generated in the execution of the microprogram. Thus, the state functions of a state machine, as well as the transitions between the various states, can be implemented as a corresponding series of one or more microcode words.
The particular implementation of a microprogrammed control logic state machine is heavily influenced by two considerations. The first is that the microcode word store is, in practical use, limited in size and, therefore, presents a general restriction on the complexity of the state machine. The second consideration is that each microcode word is sequentially executed in a discrete cycle of the control logic. Thus, the speed performance of the state machine implemented is directly dependent on the number of microcode words executed to accomplish each state function and inter-state transition. Consequently, microprogrammed controllers are somewhat slower than their random-hardwired logic counterparts and typically less optimal in terms of both size and power dissipation.
The substantial advantage to utilizing microcoded controllers is that their state machine implementations are relatively quite simple to initially design and subsequently modify. Changes in the microprogram state machine may be necessary to correct for deficiencies in the original state machine design or simply desirable to expand the capabilities of the state machine as a whole. Such changes may be introduced by appropriately modifying the control program provided in the microcode store. Consequently, despite its deficiencies in execution speed, there continues to be substantial interest in and use of microprogrammed controllers.